Discuss Make a very simple test for me in the UK Electrical Forum area at ElectriciansForums.net

Ive redrawn your circuit, to make it clear (for me).
This is not actually simulating anything, I use it just for drawing (and clarifying).
I think I get you now, thank you for it !!!
1653150996976.png
 
Ive redrawn your circuit, to make it clear (for me).
This is not actually simulating anything, I use it just for drawing (and clarifying).
I think I get you now, thank you for it !!!
View attachment 97759
Vcc at 5V and 0V go to pins 14 and 7 respectively - but you knew that - just wanted to be careful.

If you make a test rig with a known frequency crystal you could check it is working if you have a radio with a short wave band by tuning in to the weak signal from the circuit. I think short wave/HF is something like 3-30MHz if I remember well.
 
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See if you can find something that will register a 100MHz and can split from that down. I mean with discrete components. If its too much, I'll understand. And remember, we are playing until something cracks. Unfortunately I am unable to read and test anything with such high fv on any of my devices I have. But you have that cool osciloscope ... mmm. My idea is simple. If we can make a circuit with discrete components that will split from 100Mhz down, we are good. Else, we will stumble over various little shi.ts like my 555 craping itself when I need him most. Haha.
 
Vcc at 5V and 0V go to pins 14 and 7 respectively - but you knew that - just wanted to be careful.
+7V(Max) Vcc to pin4 and gnd to pin 11.
I don't know anything, I just look up in the datasheet.
(Sometimes) my biggest mistake is to presume, and I still have to learn to not doing it that often myself.
1653153122401.png
 
Mister @pc1966 and I were looking at this circuit for some time.
Flip-Flops Using Discrete Transistors:
1653153746192.png

I know it looks a bit full... I want you to try it at 100MHz and see if it can split it in half I guess, so its Q will be 50MHz. If it will do it, I will start making some of them. You are making it on breadboard, not definitive board on cardboard or fiberglass like I do it. It will really take you some minutes to check at what is the maximum fv can be used. It will be great if you have a fv variator of some kind... that will tell us the maximum range it can go.
I could make it myself but I have to make a couple of them, to really bring down the fv to my devices level that I have here. And I probably will, because it will most probably be too much for you. Will it?
 
+7V(Max) Vcc to pin4 and gnd to pin 11.
I don't know anything, I just look up in the datasheet.
(Sometimes) my biggest mistake is to presume, and I still have to learn to not doing it that often myself.
View attachment 97761
You are right and I am right! I was talking about the 14 pin dual in line pin layout which is the type I use and have sent you.
 
Good morning signori @marconi
- I was looking only on the pdf that you post it, later I realized that you may have different package than in the datasheet and you are mentioning them. But I didnt had the chance to add more comments because the timeout for comments on this website will cut your ideas off. Its a good idea to let comments on, not everyone is english speaker and everyone makes mistakes that can be repaired, if is given the chance, im speaking to this website managers/designers.
- It appears all my initiative with reading a 20MHz Before the IC's arrival fail. Because, it appears, the discrete components circuit has some limitations from its RC in there, and the 555 is not up to that fv, and I need a much higher fv than 20 anyway, at least 100MHz to have a normal range of testing these osc's. What matters is that we tried, we moved fast enough and we got results. In part2, we will use your IC's. Im curious if they will raise the the task, until the actual fv counter arrives. Another against time run. I am particularly against making anything against time and in rush !! I like it slow and precise. But this is a strange coincidence how everything falls this way. And the time is not that fast anyway, so about 1 week for an experiment is plenty for me anyway.
 
q12x : Since you mentioned the problems caused by resistance and capacitance in integrated circuits operating at high frequencies or switching speeds I thought you might enjoy reading this article:

In processors and graphics cards, what limits your clock speed? - https://techunwrapped.com/in-processors-and-graphics-cards-what-limits-your-clock-speed/

Another limit is temperature rise of the ic. Because many yet small capacitors are being charged and discharged very frequently/at a high rate - Giga Hertz in some devices - there is a significant heating effect caused by the many but small currents moving the electrons in and out of the capacitors. You know that when a current flows through resistance there is heating which causes ics like processors to warm up. So they are fitted with heat sinks and fan blows across them otherwise they would overheat and burn out. Thus, keeping the ventilation holes of your computer unobstructed is a good idea. (In the computers I worked on in the 80s with many microprocessors the air was cooled first by passing over fins cooled by chilled water at 5C.)
 
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I could make it myself but I have to make a couple of them, to really bring down the fv to my devices level that I have here. And I probably will, because it will most probably be too much for you. Will it?
I tried a quick SPICE simulation and (a) it did not work properly (toggled only first time) and (b) even then you are looking at switching times of around 10us, placing the max speed at below 50kHz even if it had worked as hoped!
 
Here is a 74HCT73 dual jk flip flop in cascaded toggle mode with first ff being clocked at 20MHz and scope showing 2Q output of second ff. thus divide by 4 to five 5MHz😀 I do not have any HCT93s to hand.
 

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Im curious if they will raise the the task, until the actual fv counter arrives. ???
Im curious if they will raise to the task, until the actual fv counter arrives. See? Small shht like this I am not allow to repair in my previous postings because this website is made against user !
q12x : Since you mentioned the problems caused by resistance and capacitance in integrated circuits operating at high frequencies or switching speeds I thought you might enjoy reading this article: In processors and graphics cards, what limits your clock speed? - https://techunwrapped.com/in-processors-and-graphics-cards-what-limits-your-clock-speed/
And I did enjoy it. I do like MCU's, and I only worked with PIC's so far, and very limited range and very few applications I used them. I didn't go nuts with them as I wished when I discovered them in my youth. But they remain a fascinating literature for me. So the RC problem in CPU's, conform to your article, is due to the micro-wiring length and thickness, remaining constant over time while the transistors got smaller. If I understood it correctly. Very interesting. Yes. Actually mister @pc1966 spotted that RC problem in the last FF (flipflop) circuit and I concluded on his finding.
Another limit is temperature rise of the ic. Because many yet small capacitors are being charged and discharged very frequently/at a high rate - Giga Hertz in some devices - there is a significant heating effect caused by the many but small currents moving the electrons in and out of the capacitors. You know that when a current flows through resistance there is heating which causes ics like processors to warm up. So they are fitted with heat sinks and fan blows across them otherwise they would overheat and burn out. Thus, keeping the ventilation holes of your computer unobstructed is a good idea. (In the computers I worked on in the 80s with many microprocessors the air was cooled first by passing over fins cooled by chilled water at 5C.)
I admit, I didnt got this interested like you did about the internals of a CPU. Very nice explanation ! I like it. As a fact, everyone got amused when coming into my room and seeing my desktop PC case with one side open all the time and an external black fan blowing into it (actually towards my 2HDD), and they asked me "is it broken?" and I respond, "no, it is properly cooled". I got into this arrangement from my very first computers and it stay with me until today. I also highly recommend it. The downside it is getting dusty, quite quickly, so 1/year I do a total cleanup, I take out the processor, re-paste it, clean everything from dust, especially its heat sink radiator, that usually develops a fur on it, like a little rat.
20220522_170055.jpg

By the way, signiori @marconi you worked in computers in the 80's you said, what did you do? Also tell me your expertise, what you did and know the best, what you master, and what you really enjoy. I realized I know nothing about you and now is a good time to ask. The same question to mister @pc1966 as well. Im equally interested.
I tried a quick SPICE simulation and (a) it did not work properly (toggled only first time) and (b) even then you are looking at switching times of around 10us, placing the max speed at below 50kHz even if it had worked as hoped!
Thank you for trying that. I am not that good in LT Spice. I have it on my pc but i cant say im good in it. Only to a point and that is a very low point.
Here is a 74HCT73 dual jk flip flop in cascaded toggle mode with first ff being clocked at 20MHz and scope showing 2Q output of second ff. thus divide by 4 to five 5MHz😀 I do not have any HCT93s to hand.
Ahaa, an experiment, very interesting result !
See if you can obtain my results: 1/10, then 1/100, then 1/1000 divisions. As a challenge of course. Also I highly recommend to use the 555 circuit that I used. Extremely helpful but to a limit as we all know it now.
 
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Thank you for trying that. I am not that good in LT Spice. I have it on my pc but i cant say im good in it. Only to a point and that is a very low point.
Simulations are useful but ultimately not always understood by those doing them. Generally speaking:
  • If a simulation tells you it won't work, almost certainly it won't work!
  • If a simulation tells you it will work, it might - you will need to try it to be sure.
Of course as you get to fancier tools, especially those that will extract PCB layout in to electrical parameters to replace the "wires" in the model, you get closer to reality, but often if is not practical to model everything that way.

More subtly you can get situations where you have two (or more) aspects to the circuit with very different time-constants, for example an RF transistor that can (and will) operate in the GHz region so needs pico-second time-steps to model the changing voltages & currents, and a bias control system that has millisecond time constants, so you need to run the simulation for billions of time-steps to complete it, leading to massive CPU effort and/or the simulator failing to converge normally.

Mathematicians have a term for this problem and lots of fun looking at ways of dealing with it:

And that is even before we get in to non-modelled aspects of the devices!

So a simulation is really about avoiding the alpha breadboard stage to see if it will do anything useful, thus you get to the beta stage quicker and cheaper, and then you can build your PCB or other more realistic prototype to confirm (or otherwise) that you are on the right track for success.
 
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q12x Attached are two short clips. The first shows a divide by 10 counter with a 20 MHz input and 2 MHz output using a 74LS93 like the ones I have sent you. The second clip is this same divide by 10 counter now with its input at 5MHz taken from the output of the divide by 4 counter I made earlier using a 74LS73 - total division by 40 thus 20MHz down to 500kHz. You will be able to do the same soon. Using the 7493 you can divide by any whole number between 2 and 16. Adding 7493s so one provides the output for the next enables further division to be done as I have shown you. Hence my suggestion you build an electronic clock using a crystal as its timing source.🙂
 

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q12x Attached are two short clips. The first shows a divide by 10 counter with a 20 MHz input and 2 MHz output using a 74LS93 .. The second clip ..total division by 40 thus 20MHz down to 500kHz...
to @marconi : very cool ! I like it. And thank you. But you are still limited by the maximum IC fv. Higher than its maximum and you are in the same situation as I am. Btw, what is he maximum fv it can see this 74LS93 ? Actually I will check it as well.
1653408896811.png

CP0 meaning Clock (at) Pin 0 and is an inverted CP0 with the bar on top. I wonder why 2 Clocks? Maybe because it has 2 sections? and CP1 is half speed? Hmm, very strange. So our CP0 is up to 32MHz. But if I feed him a 42Mhz crystal is dead in the bushes like my 555. But is good for all the crystals under its max value which is still good enough for me. I mentioned already, having a level of 100MHz is good because I can test all my osc's, especially those over 32MHz. But maybe 'my majority' is under 32 so everything will be good? I will see the 'majority' until after I build and test everything. What a strange project. I really didnt want to spent even 2h on it, and it turn out to spent 2 months, haha. Strange, right?
 
But you are still limited by the maximum IC fv. Higher than its maximum and you are in the same situation as I am.
You are always limited by the IC's max frequency!

it is just that can vary from sub-MHz (e.g. 4000B series CMOS at lower voltages) to many GHz in the case of GaAs pre-scaler ICs.

Btw, what is he maximum fv it can see this 74LS93 ? Actually I will check it as well.

The LS93 has two divider, the first is a single stage, the 2nd a 3-stage counter. Typically you clock the first and use its output to clock the 2nd for max dividing ratio.

A check in the data sheet shows this:

Also they show the logic for the LS90 (BCD = 10) and LS92 (divide 12).
 
CP1 is half of CP0 because generally one uses the first one bit flip flop to to feed the remaining 3 flip flops. It is only the first ff which has to operate at fv. The output of the first ff is fv/2. It is why this ic is arranged as one 1 bit stage and one 3 bit stages. The emphasis on fv operating speed only has to be for one ff. Division by 2 is a sizeable reduction after all. The second set of ffs can do the next division factor operating at a lower speed.
 
What a strange project. I really didnt want to spent even 2h on it, and it turn out to spent 2 months, haha. Strange, right?

As frequency increases, things get harder to engineer. One of the first uses of electronics in the tens of MHz was TV transmission. In the 1930s, very few active components could work at these frequencies. The next use to push the boundaries was RADAR, which at the beginning of WW2 found a practical limit of 200MHz with a 45MHz IF. But I cannot stress enough how difficult it was to work at these frequencies. When the airborne RADAR development team were first experimenting, they only had one IF strip that worked well enough and none of the big electronics manufacturers they approached initially could equal its performance at 45MHz. It took years of collaboration between valve makers and circuit designers to break through these boundaries.

The valve was developed to a high level of performance, then the transistor came along with lots of promise but in some ways very limited specs. A whole new development cycle began to enable the transistor to achieve some of the performance that was by then easy with valves. Then with the arrival of a whole spectrum of IC technologies, one could find a performance point that suited the application (e.g. 4000 CMOS - slow but low power, ECL - fast but power-hungry.) But the fundamental physical limitations on conductor lengths (due to capacitance and impedance), dielectric losses etc still remain today.

At hundreds of MHz, small things matter. If the leads of a component or interconnect are too long they behave like transmission lines, with wavefronts bouncing backwards and forwards and corrupting signals unless impedances are matched. Look at any recent computer motherboard and you will see design features in the PCB layout for working at high frequencies. For example, placement of components to minimise inductance and capacitance, balanced transmission lines e.g. for PCI lanes and trace meanders to adjust signal timing. In the GHz you can find multiple wavefronts flowing down a long trace - a logic 1 might be nearly at the destination but a logic 0 is following a few centimetres behind it. The trace is at different logic states in different places due to the finite propagation velocity.

So when you build something that works at 100MHz, remember that in my father's lifetime, some of the best electronic engineers in the world, with all the leverage of a military trying to get ahead of a growing threat, couldn't make 100MHz amplifiers work at all.
 
Oh, wow, very nice explanations ! All 3 of you. I really enjoy reading them. Hmmm.... I knew 100MHz is fast but now when I get it from you im thinking maybe I am pushing too far. Ive always loved extremities. Then what is a 'normal' limit that everyone is comfortable, what is the standard? If not 100MHz then what? 50MHz? I want to tell me from your experience ! Or it might be dictated only by the IC you use and have in hand, it's limit, like in my case with the 555 and @marconi with the 74LS93 and @pc1966 with its 74HC4060. And the fastest IC out there, will dictate my max speed at which I can measure my OSX's. I suppose this is the 'normal' practical way of looking at it. Huh... I didn't stay before and think too much on this line of thought, but now is becoming very logical for me. Or at least this is my piece of mind. Im curious whats yours ?
 
I'm usually very careful but this time I goof it. I misread the datasheet part number, believing it is for 74LS00, but it was for SN5400!!! You recommend it as 74LS00 datasheet and I took it for granted. Aahh. I should have being more careful.
1653688144541.png
1653688748226.png

So, here is the corrected pinout of the 7400 IC:
1653688344669.png

The ? chip there is the SN5400 pinout.
This particular SN5400 datasheet is mentioning, very confusingly I may add, the SN74LS00 in it's corner title.
That's the reason mister @marconi misread it, and also I as well. Damn. Live and learn I guess. I hate stupid mistakes like these. We all do it I suppose at a time or the other.
1653689605080.png

So this is my concluded correction.
Btw, here is the correct datasheet link for 74LS00: https://www.futurlec.com/Datasheet/74ls/74LS00.pdf
I also noticed the google search is a tiny bit confusing, popping out the SN5400 as an immediate alternative, which we took it again, for granted.
 
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This morning I received mister @marconi package.
And I quickly built up this circuit:
IMG_20220527_124846.jpg
IMG_20220527_124804.jpg
IMG_20220527_124819.jpg

and I got this result/reading:
IMG_20220527_124811.jpg

I used the exact values in the circuit, 20MHz osc, 100pF cap and mister @marconi 's 74LS00 IC.

2^21 = 2097152
-------- 3703379 (my result on the fv counter)
2^22 = 4194304
I believe I should have get a 2^x value in there and not in between.
Im not sure what value to expect really since its my first time using these logic circuits.

I built a test circuit, a very basic one, to understand how much a single gate is dividing.
I used my original 555 PWM circuit.
IMG_20220528_014635.jpg
IMG_20220528_014743.jpg

IMG_20220528_014743 Copy.jpg
IMG_20220528_014802.jpg

In conclusion, I got the same output with the input I was feeding.
I input 840Hz, I output 840Hz. WOW !!!

The breadboard circuit is exactly as the circuit schematic in the 1st picture for this experiment. I even grounded (yellow links) the unused input gates which are also linked together. I even put a filtering 100nF brand new cap on the output PWM into the first input gates. (the yellow capacitor) near the green positive link.
- What do I miss ? I don't get it.
Mister marconi give me a continuation circuit for the first osc circuit. I'll built that next. But I must say, I got very weird results so far.
 
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This particular SN5400 datasheet is mentioning, very confusingly I may add, the SN74LS00 in it's corner title.
The only difference is temperature range (and use of ceramic packaing to achieve that). The 54xx series has the full -55C to +125C military range where as the 74xx series is 0C to 70C commercial range
 
This morning I received mister @marconi package.
And I quickly built up this circuit:
View attachment 98017 View attachment 98018 View attachment 98020
and I got this result/reading:
View attachment 98021
I used the exact values in the circuit, 20MHz osc, 100pF cap and mister @marconi 's 74LS00 IC.
No decoupling capacitor!

While not always show at the IC on schematics, any fast logic design needs something like 10nF - 100nF ceramic capacitor close to the Vcc/Gnd pins of each IC or couple of ICs (maybe less if ground plane board used, etc).

You need them to keep the supply impedance down at the ~5ns switching speed of the device, that means short leads close to the IC. If you have some ceramic cap in the 10nF-100nF range (value not too critical), try straddling the IC from pins 7-14 of the oscillator and see if it changes behaviour.
 
My new fv divider:
20220606_222125.jpg

But I need a special cable that goes into fv counter, instead of those 2 (very short) wires.
Something like an osciloscope wire that is shielded is my very best guess.
1654543711728.png

I need you to tell me whats their principle and then to be able to apply it for my device here!
 
I thought I would report my progress in a short video clip showing a 40MHz crystal oscillator signal being divided by 100 to produce 400kHz pulse train. I assess my achievement as quite modest compared to what q12x has produced with fewer resources and I hope he will show in a short video clip.
 

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The fv splitter is made already, so... theoretically, if I change 74LS293 in it with the new 74HC4060, should get better at reading higher fv's. Correct?
 

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